Instrukcja obsługi Microchip SY58031U
Microchip
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SY58031U
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SY58031U
Ultra-Precision 1:8 CML Fanout Buffer
with Internal I/O Termination
Micrel Inc. • 2180 Fortune Drive • Jose, CA 95131 • USA • tel +1 (408) 944 0800 • fax + 1 (408) 474 1000 • San - - http://www.micrel.com
October 1
, 2013 Revision 5.0
hbwhelp@micrel.com or (408) 955-1690
General Description
The SY58031U is a 2.5V/3.3V precision, high-speed, fully
differential CML 1:8 fanout buffer. The SY58031U is
optimized to provide eight identical output copies with less
than 20ps of skew and only 75fsRMS phase jitter. It can
process clock signals as fast as 6GHz.
The differential input includes Micrel’s unique, 3-pin input
termination architecture that allows the SY58031U to
directly interface to CML, LVPECL, and LVDS differential
signals (AC shifting or - - -or DC coupled) without any level
termination resistor networks in the signal path. The result
is a clean, stub ce solution. The CML -free, low-jitter interfa
outputs feature 400mV typical swing into 50Ω loads and
provide an extremely fast rise/fall time guaranteed to be
less than 60ps.
The SY58031U operates from a 2.5V ±5% supply or 3.3V
±10% supply and is guaranteed over the full industrial
temperature range ( 40°C to +85°C). For applications that –
require high speed 1:8 LVPECL fanout buffers, consider -
the SY58032U and SY58033U. The SY58031U is part of
Micrel’s high speed, Precision Edge- ® product line.
Datasheets and support documentation ar on e available
Micrel’s web site at: www.micrel.com.
Block Diagram
Q1
/Q1
Q0
/Q0
IN
/IN
V
T
50Ω
50Ω
V
REF-AC
Q3
/Q3
Q2
/Q2
Q5
/Q5
Q4
/Q4
Q7
/Q7
Q6
/Q6
Precision Edge®
Features
•Precision 1:8, 400mV CML fanout buffer
•Guaranteed AC performance over temperature and
voltage:
−Clock frequency range: DC to >6GHz
−<60ps tr/tf time
−<270ps tpd
−<20ps output output skew- -to
•Low-jitter performance:
−75fsRMS phase jitter (typ.)
•50Ω -source terminated CML outputs
•400mV CML output swing into 50Ω load
•Fully differential I/O
•Accepts an input signal as low as 100mV
•Unique, patent-pending input termination and VT pin
accepts DC coupled and AC couple differential inputs- -
(LVPECL, LVDS, and CML)
•Power supply 2.5V ±5% or 3.3V ±10%
•Industrial temperature range: –40°C to +85°C
•Available in 32- × pin, 5mm 5mm QFN package
Applications
•All SONET and GigE clock distribution
•All Fibre Channel clock and data distribution
•Network routing engine timing distribution
•High- -end, low skew multiprocessor synchronous clock
distribution
Precision Edge r is a egistered trademark of icrel, Inc. M
Micrel, Inc.
SY58031U
October 1
, 2013 2 Revision 5.0
hbwhelp@micrel.com or (408) 955-1690
Ordering Information
Part Number
( )1
Package Type Operating
Range
Package Marking Lead Finish
SY58031UMG 32 -QFN Industrial SY58031U with Pb-free bar- Pb-line indicator Free NiPdAu
SY58031UMGTR( )
2 - QFN 32 Industrial SY58031U with Pb-free bar- Pb-line indicator Free NiPdAu
Note:
1. Contact factory for die availability are guaranteed at T. Dice A = 25°C, DC electricals only.
2. Tape and Reel.
Micrel, Inc.
SY58031U
October 1
, 2013 3 Revision 5.0
hbwhelp@micrel.com or (408) 955-1690
Pin Configuration
32-Pin QFN
Pin Description
Pin Number Pin Name Pin Function
3, 6 , /IN IN
Differential signal input: Each pin of this pair internally terminates with 50Ω to the VT pin.
Note that this input will default to an indeterminate state if left open. See Input Interface
Applications section.
4 VT
Input termination center ap: Each input terminates to this pin. The VT pin provides a center-t -
tap for each input (IN, /IN) to the termination network for maximum interface flexibility. See
Input Interface Applications section.
2, 7, 17, 24 GND,
Exposed Pad
Ground. Exposed pad must be connected to a ground plane that is the same potential as the
ground pin.
1, 8, 9, 16
18, 23, 25, 32 VCC Positive power supply: Bypass with 0.1μF/0.01μF low ESR capacitors as close to the pins as
possible
31, 30, 29, 28,
27, 26, 22, 21
20, 19, 15, 14
13, 12, 11, 10
Q0, /Q0, Q1, /Q1
Q2, /Q2. Q3, /Q3
Q4, /Q4, Q5, /Q5
Q6, /Q6, Q7, /Q7
CML differential output pairs: Differential buffered output copy of the input signal. The CML
output swing is typically 400mV into 50Ω. Unused output pairs may be left floating with no
impact on jitter. See CML Output Termination section
5 VREF-AC
Bias Reference Voltage: Equal to VCC
–1.2V (typical), and used for AC-coupled applications.
See Input Interface Applications section. When using V
REF AC- , bypass with 0.01μF capacitor
to VCC. Maximum sink/source current is 0.5mA.
Specyfikacje produktu
| Marka: | Microchip |
| Kategoria: | nieskategoryzowany |
| Model: | SY58031U |
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