Instrukcja obsługi Microchip PIC16F13143
Microchip
Niesklasyfikowane
PIC16F13143
Przeczytaj poniżej 📖 instrukcję obsługi w języku polskim dla Microchip PIC16F13143 (39 stron) w kategorii Niesklasyfikowane. Ta instrukcja była pomocna dla 26 osób i została oceniona przez 13.5 użytkowników na średnio 3.6 gwiazdek
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Online Reference
© 2024 Microchip Technology Inc. and its subsidiaries
DS50003666A - 1
CLB Synthesizer
The PIC16F13145 family of microcontrollers introduce a new peripheral, the Congurable Logic Block (CLB).
The CLB peripheral, comprised of 32 Basic Logic Elements (BLE), allows the users to incorporate hardware-
based custom logic into their applications. Each logic element’s Look-up Table (LUT) based design oers
vast customization options, and the CPU-independent operation improves the response time and power
consumption.
The user must congure elements as matrix multiplexers, LUTs, and ip-ops to achieve a given logic function,
which is similar to the Congurable Logic Cell (CLC) on PIC
®
MCUs or the Congurable Custom Logic (CCL) on the
AVR
®
MCUs. However, the matrix is much larger and is interconnected to a higher degree - which enables users
to make more complex logic functions. To help users focus on the intended functionality of their logic design
without having to understand the inner workings of the peripheral, Microchip provides a GUI (CLB Synthesizer)
used for Congurable Logic Block conguration.
Tool Versions: MCC-Integrated and Stand-Alone-Online
The available conguration tool has two versions: One integrated into MCC Melody and one online, stand-alone
version.
CLB Synthesizer - MCC Melody: The version of the tool integrated into MPLAB
®
Code Congurator (MCC)
Melody allows one to create a logic design from scratch or to import a logic design from the online version of
the tool. It enables the user to develop a complete application using the CLB in MCC Melody and oers a high
level of integration with other peripherals also congured using MCC Melody.
CLB Synthesizer - Online: The tool's online version allows one to create a logic design, synthesize it, and
download it as a le (bitstream). In addition to the bitstream, a template source code is provided for conguring
the CLB, but integrating it into the embedded project is left up to the user.
The logic conguration experience is common to both versions of the tool, so the tool's online version can be
used to start a logic design using the CLB before moving to MCC Melody for further development.
Congurable Logic Block Synthesizer User Guide
CLB Synthesizer

CLB Synthesizer
Online Reference
© 2024 Microchip Technology Inc. and its subsidiaries
DS50003666A - 2
Table of Contents
CLB Synthesizer.....................................................................................................................................................................1
Tool Versions: MCC-Integrated and Stand-Alone-Online .........................................................................................1
1. Getting Started...............................................................................................................................................................4
2. Drawing a Schematic.....................................................................................................................................................5
2.1. Components in CLB Synthesizer...................................................................................................................... 5
2.2. Drawing a Basic Schematic............................................................................................................................. 11
3. Status of the Synthesis Process.................................................................................................................................13
4. Tips and Tricks............................................................................................................................................................. 14
4.1. How to Make use of Limited Display Resources.......................................................................................... 14
4.2. Tidying up a Design......................................................................................................................................... 15
5. Interacting with Peripherals and the CPU................................................................................................................ 17
5.1. Interacting with Peripherals........................................................................................................................... 17
5.2. Interacting with the CPU................................................................................................................................. 18
6. Storing and Retrieving Logic Designs........................................................................................................................20
7. Using Hierarchical Modules....................................................................................................................................... 21
7.1. Using Verilog to Describe a Logic Design......................................................................................................22
8. Libraries and Modules................................................................................................................................................ 24
8.1. The Built-In PIC16F131 Device Library...........................................................................................................24
8.2. Using the Hardware Counter..........................................................................................................................24
8.3. Using Modules from the Microchip Library.................................................................................................. 25
8.4. Using Modules from a Custom Library......................................................................................................... 25
8.5. Creating a Library with Modules.................................................................................................................... 26
9. Advanced Topics..........................................................................................................................................................30
9.1. Clocking the Congurable Logic Block.......................................................................................................... 30
9.2. Preferences.......................................................................................................................................................30
9.3. Making Use of the Output ZIP........................................................................................................................ 31
9.4. Description of Output Files.............................................................................................................................31
9.5. Synthesis and Place-and-Route Process....................................................................................................... 32
10. Known Issues and Change Log..................................................................................................................................34
11. Revision History...........................................................................................................................................................35
Microchip Information....................................................................................................................................................... 36
The Microchip Website............................................................................................................................................... 36
Product Change Notication Service........................................................................................................................ 36
Customer Support.......................................................................................................................................................36
Microchip Devices Code Protection Feature............................................................................................................ 36
Legal Notice..................................................................................................................................................................36
Trademarks.................................................................................................................................................................. 37
Quality Management System.....................................................................................................................................38
Specyfikacje produktu
Marka: | Microchip |
Kategoria: | Niesklasyfikowane |
Model: | PIC16F13143 |
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