Instrukcja obsługi Texas Instruments TPIC6C595N
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TPIC6C595N
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SRG8
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EN3
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CLR
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SER IN
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DRAIN1
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DRAIN5
DRAIN6
DRAIN7
SER OUT
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TPIC6C595
SLIS061D – JULY 1998 – REVISED SEPTEMBER 2015
TPIC6C595 Power Logic 8-Bit Shift Register
Outputs are low-side, open-drain DMOS transistors
1 Features
with output ratings of 33-V to 100-mA continuous
1
• Low rDS(on), 7 TypicalΩsink-current capability. Each output provides a
• Avalanche Energy, 30 mJ 250-mA maximum current limit at TC= 25°C. The
current limit decreases as the junction temperature
• Eight Power DMOS Transistor Outputs of 100-mA
increases for additional device protection. The device
Continuous Current also provides up to 2500 V of ESD protection when
• 250-mA Current Limit Capability tested using the human-body model and the 200-V
• ESD Protection, 2500 V machine model.
• Output Clamp Voltage, 33 V The TPIC6C595 is characterized for operation over
• Devices are Cascadable the operating case temperature range of 40°C to−
125°C.
• Low-Power Consumption
Device Information(1)
2 Applications
PART NUMBER PACKAGE BODY SIZE (NOM)
• Instrumentation Clusters SOIC (16) 9.90 mm × 3.91 mm
• Tell-Tale Lamps TPIC6C595 TSSOP (16) 5.00 mm × 4.40 mm
• LED Illumination and Controls PDIP (16) 19.30 mm × 6.35 mm
• Automotive Relay or Solenoids (1) For all available packages, see the orderable addendum at
• Drivers the end of the data sheet.
Logic Symbol
3 Description
The TPIC6C595 is a monolithic, medium-voltage,
low-current power 8-bit shift register designed for use
in systems that require relatively moderate load
power such as LEDs. The device contains a built-in
voltage clamp on the outputs for inductive transient
protection. Power driver applications include relays,
solenoids, and other low-current or medium-voltage
loads.
This device contains an 8-bit serial-in, parallel-out
shift register that feeds an 8-bit D-type storage
register. Data transfers through both the shift and
storage registers on the rising edge of the shift
register clock (SRCK) and the register clock (RCK),
respectively. The device transfers data out the serial
output (SER OUT) port on the rising edge of SRCK.
The storage register transfers data to the output
buer when shift register clear (CLR) is high. When
CLR is low, the input shift register is cleared. When
output enable (G) is held high, all data in the output This symbol is in accordance with
buers is held low and all drain outputs are o. When ANSI/IEEE Std 91-1984 and IEC
G is held low, data from the storage register is Publication 617-12.
transparent to the output buers. When data in the
output buers is low, the DMOS transistor outputs are
o. When data is high, the DMOS transistor outputs
have sink-current capability. The SER OUT allows for
cascading of the data from the shift register to
additional devices.
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.

TPIC6C595
SLIS061D –JULY 1998–REVISED SEPTEMBER 2015
www.ti.com
Table of Contents
8.3 Feature Description................................................. 12
1 Features .................................................................. 1
8.4 Device Functional Modes........................................ 12
2 Applications ........................................................... 1
9 Application and Implementation ........................ 13
3 Description ............................................................. 1
9.1 Application Information............................................ 13
4 Revision History..................................................... 2
9.2 Typical Application ................................................. 13
5 Pin Conguration and Functions ......................... 310 Power Supply Recommendations ..................... 15
6 Specications......................................................... 411 Layout................................................................... 15
6.1 Absolute Maximum Ratings ...................................... 4
11.1 Layout Guidelines ................................................. 15
6.2 ESD Ratings.............................................................. 4
11.2 Layout Example .................................................... 16
6.3 Recommended Operating Conditions....................... 4
11.3 Thermal Considerations ........................................ 17
6.4 Thermal Information .................................................. 5
12 Device and Documentation Support ................. 18
6.5 Electrical Characteristics........................................... 5
12.1 Community Resources.......................................... 18
6.6 Switching Characteristics .......................................... 6
12.2 Trademarks ........................................................... 18
6.7 Typical Characteristics .............................................. 7
12.3 Electrostatic Discharge Caution............................ 18
7 Parameter Measurement Information .................. 9
12.4 Glossary ................................................................ 18
8 Detailed Description ............................................ 11 13 Mechanical, Packaging, and Orderable
8.1 Overview ................................................................. 11 Information ........................................................... 18
8.2 Functional Block Diagram ....................................... 11
4 Revision History
NOTE: Page numbers for previous revisions may dier from page numbers in the current version.
Changes from Revision C (July 1998) to Revision D Page
• Added table, section, ,ESD Ratings Feature Description Device Functional Modes Application and Implementation
section, section, section, section, andPower Supply Recommendations Layout Device and Documentation Support
Mechanical, Packaging, and Orderable Information section ................................................................................................. 1
2Submit Documentation Feedback Copyright © 1998–2015, Texas Instruments Incorporated
Product Folder Links: TPIC6C595

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VCC
SER IN
DRAIN0
DRAIN1
DRAIN2
DRAIN3
CLR
G
GND
SRCK
DRAIN7
DRAIN6
DRAIN5
DRAIN4
RCK
SER OUT
TPIC6C595
www.ti.com
SLIS061D – JULY 1998 – REVISED SEPTEMBER 2015
5 Pin Conguration and Functions
D, PW, or N Package
16-Pin SOIC, TSSOP, or PDIP
Top View
Pin Functions
PIN I/O DESCRIPTION
NAME NO.
CLR 7 I Shift register clear, active-low
DRAIN0 3 O Open-drain output
DRAIN1 4 O Open-drain output
DRAIN2 5 O Open-drain output
DRAIN3 6 O Open-drain output
DRAIN4 11 O Open-drain output
DRAIN5 12 O Open-drain output
DRAIN6 13 O Open-drain output
DRAIN7 14 O Open-drain output
G 8 I Output enable, active-low
GND 16 — Power ground
RCK 10 I Register clock
SER IN 2 I Serial data input
SER OUT 9 O Serial data output
SRCK 15 I Shift register clock
VCC 1 I Power supply
Copyright © 1998–2015, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Links: TPIC6C595
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Marka: | Texas Instruments |
Kategoria: | Niesklasyfikowane |
Model: | TPIC6C595N |
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